– Provides rich array of extended 64-bit loads and stores to/from extended GPRs
– Fully code compatible with e200z6 core
— Floating point (FPU)
– IEEE 754 compatible with software wrapper
– Scalar single precision in hardware, double precision with software library
– Conversion instructions between single precision floating point and fixed point
– Fully code compatible with e200z6 core
— Long cycle time instructions, except for guarded loads, do not increase interrupt latency
— Extensive system development support through Nexus debug port
• Advanced microcontroller bus architecture (AMBA) crossbar switch (XBAR)
— Three master ports, four slave ports
– Masters: CPU Instruction bus; CPU Load/store bus (Nexus); eDMA
– Slave: Flash; SRAM; Peripheral Bridge; calibration EBI
— 32-bit internal address bus, 64-bit internal data bus
• Enhanced direct memory access (eDMA) controller
— 32 channels support independent 8-bit, 16-bit, or 32-bit single value or block transfers
— Supports variable sized queues and circular queues
— Source and destination address registers are independently configured to post-increment or remain constant
— Each transfer is initiated by a peripheral, CPU, or eDMA channel request
— Each eDMA channel can optionally send an interrupt request to the CPU on completion of a single value or block transfer
• Interrupt controller (INTC)
— 191 peripheral interrupt request sources
— 8 software setable interrupt request sources
— 9-bit vector
– Unique vector for each interrupt request source
– Provided by hardware connection to processor or read from register
— Each interrupt source can be programmed to one of 16 priorities
— Preemption
– Preemptive prioritized interrupt requests to processor
– ISR at a higher priority preempts ISRs or tasks at lower priorities
– Automatic pushing or popping of preempted priority to or from a LIFO
– Ability to modify the ISR or task priority. Modifying the priority can be used to implement the Priority Ceiling Protocol for accessing shared resources.
— Low latency—three clocks from receipt of interrupt request from peripheral to interrupt request to processor
• Frequency Modulating Phase-locked loop (FMPLL)
— Reference clock pre-divider (PREDIV) for finer frequency synthesis resolution
— Reduced frequency divider (RFD) for reducing the FMPLL output clock frequency without forcing the FMPLL to re-lock
— System clock divider (SYSDIV) for reducing the system clock frequency in normal or bypass mode
— Input clock frequency range from 4 MHz to 20 MHz before the pre-divider, and from 4 MHz to 16 MHz at the FMPLL input
— Voltage controlled oscillator (VCO) range from 256 MHz to 512 MHz
— VCO free-running frequency range from 25 MHz to 125 MHz
— Four bypass modes: crystal or external reference with PLL on or off
— Two normal modes: crystal or external reference
— Programmable frequency modulation
– Triangle wave modulation
– Register programmable modulation frequency and depth
— Lock detect circuitry reports when the FMPLL has achieved frequency lock and continuously monitors lock status to report loss of lock conditions
– User-selectable ability to generate an interrupt request upon loss of lock
– User-selectable ability to generate a system reset upon loss of lock
— Clock quality monitor (CQM) module provides loss-of-clock detection for the FMPLL reference and output clocks
– User-selectable ability to generate an interrupt request upon loss of clock
– User-selectable ability to generate a system reset upon loss of clock
– Backup clock (reference clock or FMPLL free-running) can be applied to the system in case of loss of clock
• Calibration bus interface (EBI)
— Available only in the calibration package (496 CSP package)
— 1.8 V to 3.3 V ± 10% I/O (1.6 V to 3.6 V)
— Memory controller with support for various memory types
— 16-bit data bus, up to 22-bit address bus
— Selectable drive strength
— Configurable bus speed modes
— Bus monitor
— Configurable wait states
基于AP3031的高效LED背光驱动电源方案随着电力电子技术的发展，越来越多的便携设备开始使用中小尺寸(7`~10`)的液晶面板作为显示输出装置。由于便携设备电池容量有限，低效率的背光电源方案会严重缩短设备的工作时间，因此如何提高背光驱动的效率 DSP和FPGA在大尺寸激光数控加工系统中的运用激光切割和雕刻以其精度高、视觉效果好等特性，被广泛运用于广告业和航模制造业。在大尺寸激光加工系统的开发过程中，加工速度与加工精度是首先要解决的问题。解决速度问题的一般方法是在电机每次运动前、后设置加、 基于AD7862和dsPIC30F的数据采集系统摘要：为提高数据采集系统的采集精度和转换速度，设计基于AD7862和dstPIC30F6010A的数据采集系统，详细介绍AD7862和dsPIC30F6010A的特点和性能；并介绍该系统硬件部分和软件
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